Integrated circuits are often formed using an application specific integrated circuit architecture, which tends to reduce the design costs of the integrated circuit by using predetermined logic blocks in a somewhat customized arrangement to produce an integrated circuit according to a customer's specifications. One aspect of such a customizable integrated circuit design is referred to as RRAM.
RRAM (Reconfigurable RAM) contains sets of memories of the same type that are placed compactly within a memory matrix. An RRAM, as the term is used herein, is a megacell that can be considered as a set of memories with built-in self testing and built-in self correction systems. During each power-up phase, the self testing/correction systems identify any RAM blocks that fail predetermined tests and replace them with unused RAM blocks that pass the tests.
Field Programmable Gate Array (FPGA) hardware emulation systems are typically used to verify large, complex circuit designs prior to fabrication as chips. However, during the verification process, the identification of any failed RAM blocks will necessitate modification of the emulation board.
What is needed, therefore, is a need for a method for verifying the functionality of built in repair systems of reconfigurable memory using a Field Programmable Gate Array (FPGA) hardware emulation system.